Silicon Semiconductor

Closing the gap: How intelligent sensing is reshaping wafer process control

Here, Vidya Vijay, Director of Business Development at Nordson Test and Inspection, examines how intelligent in-situ sensing ...
Nasdaq

Akoustis Locks Process Flow for First Wafer-Level-Chip-Scale Package (WLCSP) for XBAW Filters

Charlotte, N.C., Feb. 01, 2021 (GLOBE NEWSWIRE) -- Akoustis Technologies, Inc. (NASDAQ: AKTS) (“Akoustis” or the “Company”), an integrated device manufacturer (IDM) of patented bulk acoustic wave (BAW ...

What the OCI MSA didn't solve for AI scaling

The OCI MSA settled the architecture for optical scale-up. How fast bandwidth scales is a manufacturing question, not an ...
Electronics Weekly

Imec develops die-to-wafer bond process with 2µm pad pitch

Imec has developed a Cu-to-Cu and SiCN-to-SiCN die-to-wafer bonding process resulting in a Cu bond pad pitch of only 2µm at <350nm die-to-wafer overlay error, achieving good electrical yield. Such ...
Semiconductor Engineering

Inspecting Unpatterned Wafers

Unpatterned wafer inspection, which has flown well under the radar for most of the semiconductor industry, is becoming more critical amid the need to find defects earlier in the manufacturing process ...
Semiconductor Engineering

New RDL-First PoP Fan-Out Wafer-Level Package Process With Chip-to-Wafer Bonding Technology

How a real chip-last process flow with a chip-to-wafer (C2W) bonding technology can address the RDL-base Interposer PoP challenge. Fan-Out Wafer-Level Interposer Package-on Package (PoP) design has ...
Automation World

McCrometer: Wafer-Cone Flow Meter Meets European Pressure Equipment Directive Standards

To support McCrometer’s European customers, the high-accuracy, virtually no-maintenance Wafer-Cone Flow Meter meets the requirements of the European Community’s Pressure Equipment Directive (PED) ...